Book excerpt on Teal and Truss available!

Hardware Verification with C++ Book Cover Hardware Verification with SystemVerilog Book CoverWe’re happy announce that the teal and truss section of both our C++ and SystemVerilog books are on the downloads page!

Apart from providing a preview of our style, they also provide documentation for our open-source libraries.

So to get a feel for what our books are like and to find out more details about our verification libraries teal and truss, and what “the dance” is all about, simply download either the C++ or SystemVerilog sections from our downloads page.

You can also access the chapters for teal and truss for C++ by following this link, or if you are interested in SystemVerilog follow this link.

So if these section are free, what else are in the books? Well, the section dealing with teal and truss is less then a 1/4 of the books. Most of the books could care less about our verification libraries but instead talk about how to best apply Object Oriented Programming (OOP) to Verification. We provide many code examples as well as lessons learned with the hope that you can avoid some of the pit-falls we encountered.

In fact, both our C++ and SystemVerilog verification books share the same format and are divided into four parts. The chapters provided for download are the second part of the book. In case you are curious, the four parts are:

  • Part one provides and overview of Object Oriented Programming (OOP) concepts and conceptually looks at how a high level white-board block-diagram drawing can be turned into classes and code, as well as a short history of how verification has developed.
  • Part two describes our open source verification libraries. We talk about our verification libraries in the books to show what a real, professional verification system looks like. Our hope is that people will find our libraries and ideas useful and adapt (parts of) them, or at least serve as inspiration or contrast too their actual environments. A lot of experience and industry best-practice ideas has gone into creating these libraries.
  • Part three shows how to use OOP for Verification. It’s full of lessons learned, tips-and-tricks from years of experience using OOP in both HW verification and SW development fields and multitude of projects.
  • Part four provides several complete verification environment examples too give the reader a sense for what an OOP verification environment looks like put together. As we provide the complete environment (including run scripts) we hope people can find useful code and ideas from them.

Happy reading!

Problem with support@trusster.com account fixed

People,

Due to a human mistake the support@trusster.com e-mail has not been working for, probably, the last several months. I just noticed the problem today and it’s not fixed. So if you have tried to contact us using this e-mail please try again or better post a note onto our forums

/Robert

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Usage of channels in examples

Hi,

Currently looking into the block_uart example (SystemVerilog) to check whether we should start using the truss library (Don’t have the book yet :-( . I am to SystemVerilog so maybe a stupid question, but why is in the example a uart_channel class defined which is almost equal to truss_channel iso instantiating an uart_channel of type truss_channel?

Kind Regards,
Roger.

New Release of SystemVerilog teal and Truss

Hi,

We have just posted a new release of Teal and Truss (and the examples). There is not really any major changes in functionality, it’s just this is the first release using the subversion system! Cool, eh? Feel free to browse the source code or download the new version.

Take Care,
mike

Hardware Verification With SystemVerilog — An Object Oriented Framework

Hardware Verification with SystemVerilog Book Cover New! The two chapters describing teal and truss, our open-source verification libraries can be downloaded here

Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community is turning to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP), with its focus on managing complexity, is ideally suited to this task.

With this handbook — the first to focus on applying OOP to SystemVerilog—we’ll show how to manage complexity by using layers of abstraction and base classes. By adapting these techniques, you will write more “reasonable” code, and build efficient and reusable verification components.

Both a learning tool and a reference, this handbook contains hundreds of real-world code snippets and three professional verification-system examples. You can copy and paste from these examples, which are all based on an open-source, vendor neutral
framework (with code freely available at www.trusster.com).

Learn about Object-oriented techniques such as these:

  • Creating classes—code interfaces, factory functions, reuse
  • Connecting classes—pointers, inheritance, channels
  • Using “correct by construction”—strong typing, base classes
  • Packaging it up—singletons, static methods, packages


“This handbook guides the user in applying OOP techniques for verification. Mike and Robert have captured their years of experience in a clear and easy-to-read handbook. The examples are complete, and the code is available for you to get started right away. Highly recommended.”
– Thomas D. Tessier, President,
t2design, Inc.


“This handbook contains a lot of useful advice for any verification engineer wanting to create a class-based testbench, regardless of the framework/methodology used. I recommend Hardware Verification with SystemVerilog to anyone who wants a greater understanding of how best to use OOP with SystemVerilog.”

– Dr David Long, Senior Consultant,
Doulos


“This is a fantastic book that not only shows how to use SystemVerilog and Object-Oriented Programming for verification, but also provides practical examples that are open source!”

– Stephanie Waters, Field Applications Engineer,
Cadence Design Systems


“I have been using SystemVerilog for two years in my research, and this is by far the best book I have found about how to achieve professional grade verification. I will apply these techniques on my future projects.”

– Dr. Oswaldo Cadenas, Lecturer, Electronic Engineering,
University of Reading, U.K.

Updated examples?

In looking through some of the examples, it looks like there are several files missing from the sv_2_19_2007.tar_.gz download. The alu example looks incomplete (missing generator, etc in the vip directory), and the uart examples seem to be missing some files (uart_basic_test_component, etc).

Will there be an updated download available soon?

Thanks.

Truss SystemVerilog support for Cadence?

I’m currently using Cadence Incisive (ncsim), and am trying to get the SystemVerilog Truss/Teal to compile. I have version 6.11-s001, and I get all kinds of SystemVerilog errors.

Do you guys support, or plan to support Cadence? If so, is there a script that I should try?

Thanks,
Josh

Cooley thinks where so cheesy that we’re a must see at DAC!

This is pretty cool! John Cooley has picked us as #17 on his “must see” at DAC next week. This is what he has to say:

Almost anyone who’s done verification knows about Synopsys’ VMM, but this new Teal and Truss open source equivalent caught me off guard. It’s by two guys: Mike Mintz and Robert Ekendahl who wrote a book about C++ verification and it blossomed from there into free libs for System Verilog and C++ that run in Questa and VCS, with NC-Sim and Aldec in the planning. Sun, Freescale, Cisco, and Avid are some of its users. The good people at Aldec (booth 5860) are letting Mike Mintz present there. Freebie: temporary tatoos

The simulator supported he mentions are for our systemVerilog version of teal/truss. We support many more simulators for our cpp library. So if you are at DAC please find our new SystemVerilog book at aldec’s, mentor’s or cadence’s booth. Mike will also be there some days to sign books and give a talk about verification and OOP.

Mike and I have been quiet with updates latley. I think we both got a bit burned out finishing our book.
We hope to present several new things soon after DAC, including a cool teal/truss SystemC library , a new release of teal/truss (for cpp) as well as a real bug tracking system. Stay tuned!

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My talk at DAC

Hi,

I will be giving my Object Oriented Programming for Hardware Verification Demystified talk at DAC in the Aldec booth. Stop on by and say “Hi”.

I’ll also be showing off our latest book “Hardware Verification with SystemVerilog”. It just got released today.

And if that wasn’t enough, I’ll be handing out temporary tattoos!

Take Care,
Mike

Would you be interested in more technical OOP youtube presentations?